Start  1: 20-bit-perfect-44100-192000
 1/10 Test  #1: 20-bit-perfect-44100-192000 ......   Passed
      Start  2: 20-bit-perfect-192000-44100
 2/10 Test  #2: 20-bit-perfect-192000-44100 ......   Passed
      Start  3: 20-bit-perfect-44100-65537
 3/10 Test  #3: 20-bit-perfect-44100-65537 .......   Passed
      Start  4: 20-bit-perfect-65537-44100
 4/10 Test  #4: 20-bit-perfect-65537-44100 .......   Passed
      Start  5: 28-bit-perfect-44100-192000
 5/10 Test  #5: 28-bit-perfect-44100-192000 ......   Passed
      Start  6: 28-bit-perfect-192000-44100
 6/10 Test  #6: 28-bit-perfect-192000-44100 ......   Passed
      Start  7: 28-bit-perfect-44100-65537
 7/10 Test  #7: 28-bit-perfect-44100-65537 .......   Passed
      Start  8: 28-bit-perfect-65537-44100
 8/10 Test  #8: 28-bit-perfect-65537-44100 .......   Passed
      Start  9: 1-delay-clear
 9/10 Test  #9: 1-delay-clear ....................   Passed
      Start 10: lsr-bindings
10/10 Test #10: lsr-bindings .....................   Passed

100% tests passed, 0 tests failed out of 10

Total Test time (real) =